1. Field of the Invention
The present invention relates to an image sensor device and fabrication method thereof, and more particularly, to a method of forming optical guard rings for an image sensor device to eliminate interference between photodiode and adjacent light emitting structures.
2. Description of the Related Art
Light imaging array devices are used in a wide variety of applications in the background art. These devices utilize an array of active pixels or image sensor cells. The image sensor cells usually include active image sensing elements, such as photodiodes, in addition to adjacent transistor structures, such as transfer gate structures, and reset transistors. These transistors, as well as additional devices used for control and signal circuits in the peripheral regions of the image sensor cell, or for peripheral logic circuits, include complimentary metal oxide semiconductor (CMOS) devices.
FIGS. 1A-1C are sectional views showing a portion of a semiconductor substrate, schematically illustrating a fabrication process for an image sensor device of the background art. A p-type semiconductor substrate 1 is provided. By performing ion implantation of boron, a p-well region 2 is formed in a top portion of the semiconductor substrate 1, and the concentration of p-type dopant in the p-well region 2 exceeds that in the semiconductor substrate 1. A shallow trench isolation (STI) structure 3 is then formed in a portion of the semiconductor substrate 1 to isolate the photodiode element and the transistor structure formed in subsequent steps.
In FIG. 1B, a gate insulating layer 4, e.g., such as SiO2, is defined on part of the semiconductor substrate 1. A gate structure 5, e.g., such as doped polysilicon, is then defined after deposition and etching. In FIG. 1C, n-type lightly doped drain (LDD) regions 6 are formed in areas of the p-well region 2 not covered by the gate structure 5. Spacers 7, such as SiN, are formed on the sides of the gate structure 5. Using the spacers 7 and the gate structure 5 as a mask, n-type heavily doped source/drain regions 8 and 9 are then formed in areas of p-well region 2 by ion implantation. An NMOS element 10 functioning as a transfer gate transistor or a reset transistor is thus obtained. This ion implantation procedure also results in the formation of photodiode element 12 in image sensor cell region. The photodiode element 12 consists of an n-type heavily doped region 11 in the p-well region 2.
FIG. 2 shows the problem of photons induced by the NMOS element 10, degrading sensor performance. For example, when the NMOS element 10 is in an ON state, unexpected photon (or light) emission 20 can be generated by hot carrier effect. The photons (or light) emission 20 can penetrate the STI structure 3 and strike the photodiode element 12, thereby causing noise and crosstalk, and seriously degrading the performance of the device.
U.S. Pat. No. 6,130,422 to Edward et al., the entirety of which is hereby incorporated by reference, describes a method to improve the quantum efficiency (QE) of an image sensor. The image sensor includes a photodiode and a dielectric structure. The photodiode is responsive to an amount of incident light from a light source. The dielectric structure is on top of the photodiode and between the photodiode and an interlevel dielectric (ILD) oxide layer. The dielectric structure includes a nitride material. The ILD oxide layer is made of an oxide material and has an ILD oxide thickness.
U.S. Pat. No. 6,482,669 to Fan et al., the entirety of which is hereby incorporated by reference, describes a method of improving the light collection efficiency of an image sensor. A high transmittance overcoat layer with a flat top surface is formed upon the color filter, wherein the refractive index of the overcoat layer approximates that of the color filter.
U.S. Pat. No. 6,194,258 to Wuu, the entirety of which is hereby incorporated by reference, describes a method of forming an image sensor cell and a CMOS logic circuit device. This method features the selective formation of a thin silicon oxide layer on the top surface of the photodiode element, in the image sensor cell region of a semiconductor chip. The thin silicon oxide layer prevents formation of metal silicide on the photodiode element during formation of the desired metal silicide layer on the CMOS logic devices. This allows low, dark current generation and a high signal to noise ratio.
However, the present inventors have determined that the aforementioned methods of the background art suffer from several disadvantages. For example, none of the cited methods provide shielding from light emitted from the MOS structure in the image sensor.